1. Field of the Invention
This invention relates to a low-voltage detection circuit to detect reduction in a power supply voltage that is supplied to a semiconductor integrated circuit.
2. Description of the Related Art
A microcomputer conventionally incorporates a low-voltage detection reset circuit that detects reduction in the power supply voltage and generates a reset signal and a low-voltage detection circuit to detect the reduction in the power supply voltage in advance of the generation of the reset signal in order to set various statuses of the microcomputer.
FIG. 5 is a circuit diagram of such a low-voltage detection circuit. A programmable low-voltage detection circuit 10 is provided with a first comparator circuit 11 and a first detection level setting circuit 13 capable of variably setting a first detection level that corresponds to the power supply voltage Vdd. A reference voltage Vref (1.0 V−1.5 V) that is independent of the power supply voltage Vdd is applied from a reference voltage generating circuit 14 to a positive terminal (+) of the first comparator circuit 11. The first detection level is applied from the first detection level setting circuit 13 to a negative terminal (−) of the first comparator circuit 11. The reference voltage generating circuit 14 can be made of a so-called band gap type reference voltage generating circuit.
The first detection level from the first detection level setting circuit 13 can be set at any of 2n levels corresponding to n bits of control signals from a register 15. Control data is set in the register 15 through bus lines 16 of the microcomputer. If the first detection level is set so as to be the reference voltage Vref when the power supply voltage Vdd is 2.5 V, for example, the first comparator circuit 11 outputs a reset signal of a high level when the power supply voltage Vdd drops to 2.5 V or below. The microcomputer is reset by the reset signal.
A low-voltage detection circuit 20 is provided with a second comparator circuit 21 and a second detection level setting circuit 22 capable of variably setting a second detection level that corresponds to the power supply voltage Vdd. The reference voltage Vref is applied from the reference voltage generating circuit 14 to a positive terminal (+) of the second comparator circuit 21. The second detection level is applied from the second detection level setting circuit 22 to a negative terminal (−) of the second comparator circuit 21. The second detection level set by the second detection level setting circuit 22 is usually set to be larger than the first detection level set by the first detection level setting circuit 13. An output of the second comparator 21 is inputted to and retained in a register 23 which is connected to the bus lines 16.
With the circuit described above, when the power supply voltage Vdd is reduced so that the second detection level becomes equal to or lower than the reference voltage Vref, the low-voltage detection circuit 20 detects it and sets the register 23. And the statuses of the microcomputer are set using data set in the register 23 as a flag. For example, the microcomputer is set in a HALT mode or data is saved. When the power supply voltage Vdd is farther reduced so that the first detection level becomes equal to or lower than the reference voltage Vref, the programmable low-voltage detection reset circuit 10 generates the reset signal and the microcomputer is reset. Therefore, with the circuit described above, it is made possible that the reduction in the power supply voltage Vdd is detected to set the statuses of the microcomputer in advance of the generation of the reset signal.
With the circuit described above, however, there is a problem that a size of the circuit is increased because the low-voltage detection circuit 20 dedicated to detect the reduction in the power supply voltage Vdd is required.